Tech Lead Firmware Engineer (DDR technologies) at Astera Labs

Astera Labs is seeking a Tech Lead Firmware Engineer to design and develop firmware for DDR technologies, contributing to the company's CXL memory solutions. This role involves working with cutting-edge technology and collaborating with cross-functional teams.

Responsibilities:

• Designing and developing Firmware for enabling DDR technologies.
• Debugging DDR related issues.
• Post-Silicon bring up and validation of DDR memory interfaces.
• Working with cross-functional teams and partners.

Requirements:

• Bachelor’s in Electrical engineering / Electronics / Computer Science or related fields.
• 5+ years of experience in developing Firmware using C in Embedded environments.
• Good knowledge in DDR Technology internals (DDR Training, DDR RAS, PMIC, RCD etc.)
• Ability to debug DDR related issues.

Astera Labs offers:

• Opportunity to work on future-looking products.
• Experience with RDIMMs, DDR controller/PHY tuning.
• Knowledge of Server memory performance and stability tuning for latency and bandwidth.