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Job Description
Tenstorrent is seeking a Sr. Staff Digital Design Verification Engineer to join their team in Taiwan. The candidate will be responsible for verification of digital IP and SOC logic, using advanced verification methodologies. This role offers the chance to accelerate career growth by working on challenging engineering problems with a dedicated team.
Role involves:
- Verification of Tenstorrent's digital IP and SOC logic, using advanced verification methodologies - UVM, FPGA prototyping, emulation
- Creation of test plans
- Writing testbenches, checkers and tests, models, assertions and irritators
- Creating functional coverage points
- Reviewing verification results and metrics and, driving the verification convergence towards tape-out
- Performance and power verification and validation of Tenstorrent's IP and SOC
Requirements:
- At least 8 years of experience in hardware verification languages (SystemVerilog, SystemC)
- Bachelor/Master in Electrical/Computer Engineering/Engineering Science
- Experience with UVM and coverage driven constrained random verification
- Experience with Low power verification techniques
- Excellent programming skills. C/C++ as well as scripting languages (Perl, tcl)
- Deep interest in computer architecture
Tenstorrent offers:
- A highly competitive compensation package and benefits
