Senior Physical Design Engineer

Job Description

Tenstorrent is seeking a Senior Physical Design Engineer to join their team in Bengaluru. The successful candidate will be involved in all implementation aspects from synthesis to tapeout for various IPs on the chip, working alongside experienced engineers across various domains of AI chip design.

• Define PD requirements by working closely with the front-end team
• Understand the chip architecture and drive physical aspects early in the design cycle
• Perform physical design tasks including synthesis, PnR, timing closure, area improvement, floorplanning, clocking, I/O planning, and power optimization
• Engage in discussions with 3rd party IP providers, foundry partners, and design services
• Execute end-to-end tasks from flow development to sign-off
• Deploy innovative techniques for improving power, performance, and area of the design
• Drive experiments with RTL and evaluate synthesis, timing, and power results

Requirements:

• BS/MS/PhD in EE/ECE/CE/CS
• Hands-on experience with synthesis, block and chip level implementation with industry standard PnR flows and tools
• Strong experience in SOC/ASIC/GPU/CPU design flows on taped out designs, expertise in timing closure at block/chip levels and ECO flows
• Experience with back-end design tools such as Primetime, Innovus, RedHawk, etc.
• Knowledge of low-power design flows such as power gating, multi-Vt and voltage scaling
• Strong programming skills in Tcl/Perl/Shell/Python
• Excellent understanding of logic design fundamentals and gate/transistor level implementation
• Exposure to DFT is an asset
• Prior experience working on high performance technology nodes and understanding of deep sub-micron design problems/solutions
• Strong problem-solving and debug skills across various levels of design hierarchies

Tenstorrent offers:

• A highly competitive compensation package and benefits