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Job Description
Tenstorrent is seeking a Senior Engineer, Digital Design Verification, to contribute to their cutting-edge AI technology. This role involves the verification of Tenstorrent's digital IP and SOC logic, utilizing advanced verification methodologies such as UVM, C/C++/Python, FPGA prototyping, and emulation. The candidate will be responsible for the execution and creation of test plans, writing testbenches, checkers and tests, models, assertions, and initiators. They will also review verification results and metrics, contributing to tape-out, and participate in performance and power verification and validation of Tenstorrent's IP and SOC.
Responsibilities:
- Verification of Tenstorrent's digital IP and SOC logic
- Execution and creation of test plans
- Writing testbenches, checkers and tests, models, assertions and initiators
- Creating functional coverage points
- Reviewing verification results and metrics
- Performance and power verification and validation of Tenstorrent's IP and SOC
Requirements:
- 5-8 years experience in block-level verification
- Strong hardware verification language experience (SystemVerilog, SystemC)
- Knowledge of UVM and coverage driven constrained random verification
- Excellent programming skills – particularly C, C++, Python
- Deep interest in computer architecture
Tenstorrent offers:
- Hybrid work environment
- Competitive compensation package and benefits
