Job Description
Tenstorrent is seeking a Senior Engineer, Ethernet IP Validation to validate and enable the next generation of Ethernet MAC and PHY IPs that power cutting-edge AI accelerator chips. This role is at the intersection of embedded systems, silicon validation, and advanced networking. The candidate will work with best-in-class IP from leading vendors and in-house designs, bringing up and validating these IPs in silicon, and building robust validation infrastructure that ensures performance, interoperability, and reliability at scale. This position is hybrid in Toronto, Canada or Santa Clara, California. Tenstorrent will consider Remote candidates on a case-by-case basis.
Role Involves:
- Validating and debugging high-speed Ethernet MAC and PHY IPs (400GbE/800GbE).
- Performing functional, performance, and compliance testing.
- Building automated validation suites using traffic generators and real-world packet scenarios.
- Driving post-silicon bring-up across simulation, emulation, and lab environments.
- Writing embedded diagnostics, bring-up scripts, and validation firmware.
- Debugging low-level issues using JTAG, MDIO, trace tools, and protocol analyzers.
- Developing pre-silicon test frameworks in simulation and emulation environments.
- Contributing to CI/CD flows for silicon validation pipelines.
- Delivering production-ready routines for low-level IP initialization, link training, telemetry, and RAS diagnostics.
Requirements:
- Bachelor’s or Master’s in Electrical or Computer Engineering with more than 8 years of relevant experience.
- Strong embedded systems background with C/C++ (bare-metal, RTOS, or embedded Linux).
- Deep familiarity with Ethernet MAC/PHY architecture, including SerDes, PCS/PMA, link training, and packet framing.
- Experience with pre- and post-silicon validation, including hands-on with traffic generators and lab equipment.
- Comfortable with debugging tools and interfaces like UART, JTAG, MDIO, and analyzing packet traces.
Tenstorrent offers:
- Opportunity to be a core part of shaping next-gen AI acceleration hardware.
- Chance to work with a high-caliber team of silicon, systems, and software engineers.
- Ability to own and influence the entire lifecycle of Ethernet IP validation.
- Chance to help define the future of networking in AI platforms.