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CPU Subsystem Verification engineer - RISC

CPU Subsystem Verification Engineer for RISC-V CPU microarchitectures.
Tenstorrent
On-Site
India
Undisclosed salary
Job Description
Tenstorrent is seeking a CPU Subsystem Verification Engineer to contribute to cutting-edge AI technology. This role involves leading the pre-silicon RTL and verification of high-performance CPU microarchitectures designed for AI/ML applications. The engineer will work closely with RTL, Physical Design, and CPU Performance teams to align design and verification efforts for seamless integration.

Responsibilities:
  • Lead and mentor a team of engineers in RTL design and verification for the CPU Subsystem.
  • Define and manage the subsystem IP roadmap.
  • Work closely with RTL, Physical Design, and CPU Performance teams.
  • Develop Universal Verification Components (UVCs) from scratch and implement test plans.
  • Conduct functional verification at the RTL level.
  • Utilize C++, scripting languages, and industry-leading simulation tools.
  • Collaborate with Architecture, Design, and Software teams.
  • Ensure adherence to quality metrics and best practices.
  • Drive team development by setting individual and collective goals.

Requirements:
  • Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Science, or related fields.
  • Proven leadership experience managing design and verification teams.
  • Expertise in SystemVerilog, UVM, and verification methodologies.
  • Strong knowledge of computer architecture, microprocessor verification, cache systems, and interconnects.
  • Experience with DFD IP verification is a plus.
  • Excellent strategic planning, communication, and cross-functional collaboration skills.
  • Ability to drive technical strategy, influence organizational goals, and align teams for execution.

Tenstorrent offers:
  • A highly competitive compensation package and benefits.
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