CAD & Methodology Physical Design Engineer

Job Description

Tenstorrent is seeking a CAD & Methodology Physical Design Engineer to contribute to their cutting-edge AI technology. The engineer will collaborate with global experts to design and integrate chiplets into a System-in-package. This role involves developing flows, tools, and methodologies for next-generation SoCs, focusing on CPU, GPU, Analog/Mixed Signal, and SOC designs. The engineer will explore new technology nodes and collaborate with design teams and tool vendors to improve PPA and design productivity. They will also develop internal methodologies using CAD algorithms and ML.Role involves:

• Participating and engaging with cross functional teams to tackle key physical design challenges.
• Developing innovative solutions in physical design and optimization space.
• Developing and supporting implementation flows for multiple projects and design teams.
• Developing and maintaining custom CAD tools for implementation and signoff.
• Creating flows to enable successful deployment of new technology nodes.
• Developing tools and methodologies for best-in-class PPA and productivity including ML based solutions.
• Collaborating with other teams such as physical design verification, RC extraction, IR and static timing analysis (STA).
• Working directly with EDA tool vendors to resolve tool issues and identify areas for tool improvements.
• Scripting in an interpreted language, minimum TCL in addition to at least one other

Requirements:

• Bachelor, Master or PhD degree in electrical, computer engineering or computer science.
• At least 5 years of relevant industry experience.
• Experience with integrated circuit design tools (e.g. Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure.
• Experience with PV convergence, including static timing and power analysis.
• Experience with chip physical design verification, including formal equivalence, timing, electrical rules, DRC/LVS, noise and electro-mitigation checks.
• Hands-on experience with synthesis, block and chip level implementation with industry standard PnR flows and tools.
• Strong experience in SoC/ASIC/GPU/CPU design flows on taped out designs.
• Expertise in timing closure and block/chip levels and ECO flows.
• Experience with scripting in an interpreted language (Python, TCL).
• Willingness to work with others in a highly complex decision space.
• Skills at developing an implementation plan, monitoring key indicators and communicating resource needs, as well as scoping risk to deliver value on schedule.
• Excellent verbal and written communication in English, and collaboration skills.

Tenstorrent offers:

• A highly competitive compensation package and benefits.
• Opportunity to work on cutting-edge AI technology.
• Collaboration with worldwide experts and leaders.