Senior Package Design Engineer

Job Description

Astera Labs is seeking a Senior Package Design Engineer to join their packaging team. This role involves designing package substrates independently, from initial definition to tape-out, while optimizing performance and ensuring manufacturability. The engineer will collaborate with cross-functional teams, including SI/PI, program management, product engineering, and hardware engineering.

Astera Labs is a global leader in purpose-built connectivity solutions.

The role involves:

• Designing package substrates from definition to tape-out.
• Working with netlists and specifications.
• Optimizing performance.
• Ensuring design for manufacturing.
• Performing sign-off verification.
• Collaborating with cross-functional teams.

Requirements:

• BS/MS in Engineering (Electrical, Mechanical, Materials Science, Physics).
• Minimum 5 years of experience with Cadence APD/SIP.
• Experience designing and laying out FCBGA/FCCSP packages independently.
• Familiarity with BGA package substrate technologies and assembly processes.
• Understanding of BOM, stackups, and high-speed design rules.
• Working knowledge of package reliability and SI/PI.
• Proficiency in Cadence APD/SiP.
• Good understanding of BGA package BOM and integration into APD layout and routing design rules.

The role offers:

• Opportunity to work on cutting-edge connectivity products.
• Collaboration with leading cloud service providers and server/networking OEMs.
• Dynamic and innovative work environment.